MFB ASFIFOX

ENTITY MFB_ASFIFOX IS

This component provides the transition between the clock domains of the two MFB interfaces through the ASFIFOX component. For more information about ASFIFOX see the documentation

Generics

Generic

Type

Default

Description

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MFB parameters

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=====

MFB_REGIONS

integer

4

any possitive value

MFB_REG_SIZE

integer

8

any possitive value

MFB_BLOCK_SIZE

integer

8

any possitive value

MFB_ITEM_WIDTH

integer

8

any possitive value

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FIFO PARAMETERS

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=====

FIFO_ITEMS

natural

512

FIFO depth in number of data words, must be power of two! Minimum value is 2.

RAM_TYPE

string

“BRAM”

Select memory implementation. Options: “LUT” - effective for shallow FIFO (approx. ITEMS <= 64), “BRAM” - effective for deep FIFO (approx. ITEMS > 64).

FWFT_MODE

boolean

True

First Word Fall Through mode. If FWFT_MODE=True, valid data will be ready at the ASFIFOX output without RD_EN requests.

OUTPUT_REG

boolean

True

Enabled output registers allow better timing for a few flip-flops.

METADATA_WIDTH

natural

0

Width of Metadata

DEVICE

string

“ULTRASCALE”

The DEVICE parameter is ignored in the current component version. It can be used in the future.

ALMOST_FULL_OFFSET

natural

FIFO_ITEMS/2

Sets the maximum number of remaining free data words in the ASFIFOX that triggers the WR_AFULL signal.

ALMOST_EMPTY_OFFSET

natural

FIFO_ITEMS/2

Sets the maximum number of data words stored in the ASFIFOX that triggers the RD_AEMPTY signal.

Ports

Port

Type

Mode

Description

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RX MFB interface

=====

Runs on RX_CLK

RX_CLK

std_logic

in

RX_RESET

std_logic

in

RX_DATA

std_logic_vector(MFB_REGIONS*MFB_REG_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)

in

RX_META

std_logic_vector(MFB_REGIONS*METADATA_WIDTH-1 downto 0)

in

RX_SOF

std_logic_vector(MFB_REGIONS-1 downto 0)

in

RX_EOF

std_logic_vector(MFB_REGIONS-1 downto 0)

in

RX_SOF_POS

std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REG_SIZE))-1 downto 0)

in

RX_EOF_POS

std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REG_SIZE*MFB_BLOCK_SIZE))-1 downto 0)

in

RX_SRC_RDY

std_logic

in

RX_DST_RDY

std_logic

out

RX_AFULL

std_logic

out

RX_STATUS

std_logic_vector(log2(FIFO_ITEMS) downto 0)

out

=====

TX MFB interface

=====

Runs on TX_CLK

TX_CLK

std_logic

in

TX_RESET

std_logic

in

TX_DATA

std_logic_vector(MFB_REGIONS*MFB_REG_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)

out

TX_META

std_logic_vector(MFB_REGIONS*METADATA_WIDTH-1 downto 0)

out

TX_SOF

std_logic_vector(MFB_REGIONS-1 downto 0)

out

TX_EOF

std_logic_vector(MFB_REGIONS-1 downto 0)

out

TX_SOF_POS

std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REG_SIZE))-1 downto 0)

out

TX_EOF_POS

std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REG_SIZE*MFB_BLOCK_SIZE))-1 downto 0)

out

TX_SRC_RDY

std_logic

out

TX_DST_RDY

std_logic

in

TX_AEMPTY

std_logic

out

TX_STATUS

std_logic_vector(log2(FIFO_ITEMS) downto 0)

out