Frame Unpacker
- ENTITY FRAME_UNPACKER IS
This unit accepts and processes SuperPackets. SuperPackets consist of one or more MFB frames. Each of these
individual
frames has a special header:Length [16 b]
User-defined [HEADER_LENGTH-16 b]
MFB frame [60 – (PKT_MTU-HEADER_LENGTH)]
Fields description:
Length [B] - a 16-bit number in the little-endian format specifying the length of the frame (without this header) in bytes,
User-defined - the rest of the header is defined by the user.
The length field is mandatory, from which the minimum size of the header is derived. The header is cut off each frame and send to output as metadata/MVB header.
The frames inside a SuperPacket are aligned according to the MFB specification, which can create small alignment “gaps” between them (max MBLOCK_SIZE-1 Items). This component can also deal with frames that have the small alignment gap after the last frame of the SuperPacket (i.e., when the EOF POS of the SuperPacket is extended by the alignment gap and is a few Items behind the EOF POS of the individual frame).
GenericsGeneric
Type
Default
Description
MFB_REGIONS
natural
4
Number of Regions within a data word, must be power of 2.
MFB_REGION_SIZE
natural
8
Region size (in Blocks).
MFB_BLOCK_SIZE
natural
8
Block size (in Items), must be 8.
MFB_ITEM_WIDTH
natural
8
Item width (in bits), must be 8.
MVB_ITEMS
natural
MFB_REGIONS
Number of MVB headers.
MVB_ITEM_WIDTH
natural
16
Width of each MVB header (in bits).
HEADER_LENGTH
natural
16
Length of the prepended header (in Items). The minimum is 2 Items (16b), which are for the Length field that is necesary for the unpacking process.
UNPACKING_STAGES
natural
20
Number of stages in the Offset pipeline. It is also the maximum number of individual frames inside a single SuperPacket. Must be greater than 0!
META_OUT_MODE
natural
0
- The extracted Header is output as:
Insert header to output metadata with SOF (MODE 0),
Insert header to output metadata with EOF (MODE 1),
Insert header on MVB (MODE 2).
PKT_MTU
natural
2**14
Maximum size of a packet (in Items).
DEVICE
string
“STRATIX10”
FPGA device name: ULTRASCALE, STRATIX10, AGILEX, …
Port
Type
Mode
Description
=====
Clock and Reset
=====
=====
CLK
std_logic
in
RESET
std_logic
in
=====
TX MVB Headers (per each SuperPacket)
=====
=====
RX_MVB_DATA
std_logic_vector(MVB_ITEMS*MVB_ITEM_WIDTH-1 downto 0)
in
RX_MVB_VLD
std_logic_vector(MVB_ITEMS-1 downto 0)
in
RX_MVB_SRC_RDY
std_logic
in
RX_MVB_DST_RDY
std_logic
out
=====
RX MFB STREAM (SuperPackets)
=====
=====
RX_MFB_DATA
std_logic_vector(MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)
in
RX_MFB_SOF_POS
std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REGION_SIZE))-1 downto 0)
in
RX_MFB_EOF_POS
std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REGION_SIZE*MFB_BLOCK_SIZE))-1 downto 0)
in
RX_MFB_SOF
std_logic_vector(MFB_REGIONS-1 downto 0)
in
RX_MFB_EOF
std_logic_vector(MFB_REGIONS-1 downto 0)
in
RX_MFB_SRC_RDY
std_logic
in
RX_MFB_DST_RDY
std_logic
out
=====
TX MFB STREAM (unpacked frames)
=====
=====
TX_MFB_DATA
std_logic_vector(MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)
out
TX_MFB_META
std_logic_vector(MFB_REGIONS*(MVB_ITEM_WIDTH+HEADER_LENGTH*MFB_ITEM_WIDTH)-1 downto 0)
out
Valid with SOF, EOF, or not valid at all. Contains concatenated MVB header and extracted SuperPacket header (RX_MVB_DATA & getit_indv_hdr_data).
TX_MFB_SOF_POS
std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REGION_SIZE))-1 downto 0)
out
TX_MFB_EOF_POS
std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REGION_SIZE*MFB_BLOCK_SIZE))-1 downto 0)
out
TX_MFB_SOF
std_logic_vector(MFB_REGIONS-1 downto 0)
out
TX_MFB_EOF
std_logic_vector(MFB_REGIONS-1 downto 0)
out
TX_MFB_SRC_RDY
std_logic
out
TX_MFB_DST_RDY
std_logic
in
=====
TX MVB Headers (MVB and SuperPacket headers)
=====
=====
TX_MVB_DATA
std_logic_vector(MFB_REGIONS*(MVB_ITEM_WIDTH+HEADER_LENGTH*MFB_ITEM_WIDTH)-1 downto 0)
out
TX_MVB_VLD
std_logic_vector(MFB_REGIONS-1 downto 0)
out
TX_MVB_SRC_RDY
std_logic
out
TX_MVB_DST_RDY
std_logic
in
Arcitecture
The Frame Unpacker operates in the following way. First, it extracts the length of the first individual frame of the SuperPacket from the first header (located immediately behind SOF). To get the offset of the SOF of the following individual frame, it makes a sum of the length (from the header), length of the header (a constant), and the SOF POS (which is offset by the region it is located in). This offset points to the Item behind the current frame, which means two things:
getting the EOF POS of the current frame means only subtracting one from the offset, and
getting the actual SOF POS of the next frame means rounding up the offset to the next Block.
These computations are done for all individual packets in a SuperPacket. However, the rounded offset of the last individual frame is invalid, as it points to a Start Of Frame that does not exist. During the unpacking process, all lengths of the individual frames are accumulated into one offset, i.e., one offset is for one whole SuperPacket.
So the whole idea behind the unpacking process consists of the following:
searching for the SOF and extracting the length field
the sum of the extracted length and the offset and its round-up and propagation
This process happens in multiple stages (generic UNPACKING_STAGES), where only a single individual packet can be “unpacked” in each stage. That is independent of the individual frame’s length and applies even when multiple individual frames are in a single word. Therefore, the UNPACKING_STAGES value indicates the maximum amount of frames that can be unpacked from a single SuperPacket. However, the more stages there are, the more resources the Frame Unpacker consumes.
After the unpacking process, the headers of the individual packets are extracted and concatenated with the MVB headers from the FIFOX_MULTI. These are then forwarded to the output on MVB or are inserted as metadata to the corresponding packets. At the end of the pipeline, the headers of the individual packets are cut off (which does not happen during their extraction).
Block diagram
Subcomponents
The Frame Unpacker has two dedicated subcomponents: the Offset Processor and the SOF Creator. They are illustrated at the bottom of the diagram above and documented below.
Offset Processor
- ENTITY OFFSET_PROCESSOR IS
The Offset Processor (OP) receives the offset from the OP in the previous stage along with its SOF (the Old SOF). From the SOF Creator (also in the previous stage), it receives the extracted Length and its own SOF (the New SOF). Based on the Old SOF, it propagates either the received offset (when Old SOF = 1) or “creates” a new offset by rounding up the received offset to the next Block and adding the received length to it. The updated offset is propagated by the
GenericsMVB_AGGREGATE_LAST_VLD
component to the following Regions and Words until another SOF (Old or New) overwrites the current one.Generic
Type
Default
Description
MFB_REGIONS
natural
4
Number of Regions within a data word, must be power of 2.
MFB_REGION_SIZE
natural
8
Region size (in Blocks).
MFB_BLOCK_SIZE
natural
8
Block size (in Items), must be 8.
MFB_ITEM_WIDTH
natural
8
Item width (in bits), must be 8.
MFB_META_WIDTH
natural
0
Metadata width (in bits).
PKT_MTU
natural
2**12
Maximum size of a packet (in Items).
MAX_WORDS
natural
PKT_MTU/(MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE)
Maximum amount of words one (individual) packet can strech over.
OFFSET_WIDTH
natural
log2(MAX_WORDS*MFB_REGIONS*MFB_REGION_SIZE)
Offset size (in Blocks).
LENGTH_WIDTH
natural
16
Width of the Length field.
LAST_VLD_IMPL
string
“serial”
Last Valid implementation. Options: “serial”, “parallel”, “prefixsum”
DEVICE
string
“STRATIX10”
FPGA device name: ULTRASCALE, STRATIX10, AGILEX, …
Port
Type
Mode
Description
=====
Clock and Reset
=====
=====
CLK
std_logic
in
RESET
std_logic
in
=====
RX inf
=====
=====
RX_DATA
slv_array_t (MFB_REGIONS-1 downto 0)(MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)
in
RX_META
slv_array_t (MFB_REGIONS-1 downto 0)(MFB_META_WIDTH-1 downto 0)
in
RX_OFFSET
u_array_t (MFB_REGIONS-1 downto 0)(OFFSET_WIDTH-1 downto 0)
in
RX_LENGTH
u_array_t (MFB_REGIONS-1 downto 0)(LENGTH_WIDTH-1 downto 0)
in
RX_WORD
u_array_t (MFB_REGIONS-1 downto 0)(log2(MAX_WORDS)-1 downto 0)
in
RX_OLD_SOF
std_logic_vector(MFB_REGIONS-1 downto 0)
in
RX_NEW_SOF
std_logic_vector(MFB_REGIONS-1 downto 0)
in
RX_SOF_MASK
std_logic_vector(MFB_REGIONS-1 downto 0)
in
RX_SRC_RDY
std_logic
in
RX_DST_RDY
std_logic
out
=====
TX inf
=====
=====
TX_DATA
slv_array_t (MFB_REGIONS-1 downto 0)(MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)
out
TX_META
slv_array_t (MFB_REGIONS-1 downto 0)(MFB_META_WIDTH-1 downto 0)
out
TX_OFFSET
u_array_t (MFB_REGIONS-1 downto 0)(OFFSET_WIDTH-1 downto 0)
out
TX_WORD
u_array_t (MFB_REGIONS-1 downto 0)(log2(MAX_WORDS)-1 downto 0)
out
TX_OLD_SOF
std_logic_vector(MFB_REGIONS-1 downto 0)
out
TX_SOF_MASK
std_logic_vector(MFB_REGIONS-1 downto 0)
out
TX_SRC_RDY
std_logic
out
TX_DST_RDY
std_logic
in
SOF Creator
- ENTITY SOF_CREATOR IS
The SOF Creator accepts the “new” offset from the Offset Processor and rounds it up to the nearest Block. Then it evaluates it to determine whether it points to this Word and this Region, and if it does, it asserts (creates) SOF. Lastly, with the help of the rounded offset, it extracts the Length field of the header of the following individual frame in the SuperPacket.
GenericsGeneric
Type
Default
Description
MFB_REGIONS
natural
4
Number of Regions within a data word, must be power of 2.
MFB_REGION_SIZE
natural
8
Region size (in Blocks).
MFB_BLOCK_SIZE
natural
8
Block size (in Items), must be 8.
MFB_ITEM_WIDTH
natural
8
Item width (in bits), must be 8.
MFB_META_WIDTH
natural
0
Metadata width (in bits).
PKT_MTU
natural
2**12
Maximum size of a packet (in Items).
MAX_WORDS
natural
PKT_MTU/(MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE)
Maximum amount of words one (individual) packet can strech over.
OFFSET_WIDTH
natural
log2(MAX_WORDS*MFB_REGIONS*MFB_REGION_SIZE)
Offset size (in Blocks).
LENGTH_WIDTH
natural
16
Width of the Length field.
HDR_LENGTH
natural
16
Header length (in Items).
REGION_NUMBER
natural
0
The ID of the analyzer withing this stage.
DEVICE
string
“STRATIX10”
FPGA device name: ULTRASCALE, STRATIX10, AGILEX, …
Port
Type
Mode
Description
=====
Clock and Reset
=====
=====
CLK
std_logic
in
RESET
std_logic
in
=====
RX inf
=====
=====
RX_DATA
std_logic_vector(MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)
in
RX_META
std_logic_vector(MFB_META_WIDTH-1 downto 0)
in
RX_OFFSET
unsigned (OFFSET_WIDTH-1 downto 0)
in
RX_WORD
unsigned (log2(MAX_WORDS)-1 downto 0)
in
RX_SOF_MASK
std_logic
in
=====
TX inf
=====
=====
TX_DATA
std_logic_vector(MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)
out
TX_META
std_logic_vector(MFB_META_WIDTH-1 downto 0)
out
TX_OFFSET
unsigned (OFFSET_WIDTH-1 downto 0)
out
TX_LENGTH
unsigned (LENGTH_WIDTH-1 downto 0)
out
TX_WORD
unsigned (log2(MAX_WORDS)-1 downto 0)
out
TX_NEW_SOF
std_logic
out
TX_SOF_MASK
std_logic
out