MFB Merger Simple

ENTITY MFB_MERGER_SIMPLE IS

This component merges two MFB streams into a single one. It starts merging from Input 0. After CNT_MAX clock cycles, it tries to switch to the other input. If there are no valid data on the other input, it stays on the current one and waits for the same number of clock cycles before checking again.

Generics

Generic

Type

Default

Description

REGIONS

natural

2

Number of Regions in a data word.

REGION_SIZE

natural

8

Number of Blocks in a Region.

BLOCK_SIZE

natural

8

Number of Items in a Block.

ITEM_WIDTH

natural

8

Number of bits in an Item.

META_WIDTH

natural

8

Number of bits for metadata in a single Region.

MASKING_EN

boolean

True

Enable masking SOF and EOF due to switch to the other input.

CNT_MAX

integer

64

Maximum amount of clock periods with destination ready before it tries to switch to the other input.

Ports

Port

Type

Mode

Description

=====

Clock and Reset

=====

=====

CLK

std_logic

in

RST

std_logic

in

=====

RX interface 0

=====

=====

RX_MFB0_DATA

std_logic_vector(REGIONS*REGION_SIZE*BLOCK_SIZE*ITEM_WIDTH-1 downto 0)

in

RX_MFB0_META

std_logic_vector(REGIONS*META_WIDTH-1 downto 0)

in

RX_MFB0_SOF

std_logic_vector(REGIONS-1 downto 0)

in

RX_MFB0_SOF_POS

std_logic_vector(REGIONS*max(1,log2(REGION_SIZE))-1 downto 0)

in

RX_MFB0_EOF

std_logic_vector(REGIONS-1 downto 0)

in

RX_MFB0_EOF_POS

std_logic_vector(REGIONS*log2(REGION_SIZE*BLOCK_SIZE)-1 downto 0)

in

RX_MFB0_SRC_RDY

std_logic

in

RX_MFB0_DST_RDY

std_logic

out

=====

RX interface 1

=====

=====

RX_MFB1_DATA

std_logic_vector(REGIONS*REGION_SIZE*BLOCK_SIZE*ITEM_WIDTH-1 downto 0)

in

RX_MFB1_META

std_logic_vector(REGIONS*META_WIDTH-1 downto 0)

in

RX_MFB1_SOF

std_logic_vector(REGIONS-1 downto 0)

in

RX_MFB1_SOF_POS

std_logic_vector(REGIONS*max(1,log2(REGION_SIZE))-1 downto 0)

in

RX_MFB1_EOF

std_logic_vector(REGIONS-1 downto 0)

in

RX_MFB1_EOF_POS

std_logic_vector(REGIONS*log2(REGION_SIZE*BLOCK_SIZE)-1 downto 0)

in

RX_MFB1_SRC_RDY

std_logic

in

RX_MFB1_DST_RDY

std_logic

out

=====

TX interface

=====

=====

TX_MFB_DATA

std_logic_vector(REGIONS*REGION_SIZE*BLOCK_SIZE*ITEM_WIDTH-1 downto 0)

out

TX_MFB_META

std_logic_vector(REGIONS*META_WIDTH-1 downto 0)

out

TX_MFB_SOF

std_logic_vector(REGIONS-1 downto 0)

out

TX_MFB_SOF_POS

std_logic_vector(REGIONS*max(1,log2(REGION_SIZE))-1 downto 0)

out

TX_MFB_EOF

std_logic_vector(REGIONS-1 downto 0)

out

TX_MFB_EOF_POS

std_logic_vector(REGIONS*log2(REGION_SIZE*BLOCK_SIZE)-1 downto 0)

out

TX_MFB_SRC_RDY

std_logic

out

TX_MFB_DST_RDY

std_logic

in

MFB Merger Simple GEN

ENTITY MFB_MERGER_SIMPLE_GEN IS

This is a generic implementation of the MFB Merger when the number of input interfaces can be set to arbitrary large number.

Generics

Generic

Type

Default

Description

MERGER_INPUTS

natural

2

number of independent input MFB interfaces, should be the power of two

MFB_REGIONS

natural

2

MFB parameters

MFB_REGION_SIZE

natural

8

MFB_BLOCK_SIZE

natural

8

MFB_ITEM_WIDTH

natural

8

MFB_META_WIDTH

natural

8

MASKING_EN

boolean

TRUE

Enable masking SOF and EOF due to switch to the other input.

CNT_MAX

integer

64

Maximum amount of clock periods with destination ready before it tries to switch to the other input.

Ports

Port

Type

Mode

Description

=====

Clock and Reset

=====

=====

CLK

std_logic

in

RST

std_logic

in

=====

Multiple input RX MFB interfaces

=====

=====

RX_MFB_DATA

slv_array_t(MERGER_INPUTS -1 downto 0)(MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)

in

RX_MFB_META

slv_array_t(MERGER_INPUTS -1 downto 0)(MFB_REGIONS*MFB_META_WIDTH-1 downto 0)

in

RX_MFB_SOF

slv_array_t(MERGER_INPUTS -1 downto 0)(MFB_REGIONS-1 downto 0)

in

RX_MFB_EOF

slv_array_t(MERGER_INPUTS -1 downto 0)(MFB_REGIONS-1 downto 0)

in

RX_MFB_SOF_POS

slv_array_t(MERGER_INPUTS -1 downto 0)(MFB_REGIONS*max(1, log2(MFB_REGION_SIZE))-1 downto 0)

in

RX_MFB_EOF_POS

slv_array_t(MERGER_INPUTS -1 downto 0)(MFB_REGIONS*log2(MFB_REGION_SIZE*MFB_BLOCK_SIZE)-1 downto 0)

in

RX_MFB_SRC_RDY

std_logic_vector(MERGER_INPUTS -1 downto 0)

in

RX_MFB_DST_RDY

std_logic_vector(MERGER_INPUTS -1 downto 0)

out

=====

Single output TX interface

=====

=====

TX_MFB_DATA

std_logic_vector(MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)

out

TX_MFB_META

std_logic_vector(MFB_REGIONS*MFB_META_WIDTH-1 downto 0)

out

TX_MFB_SOF

std_logic_vector(MFB_REGIONS-1 downto 0)

out

TX_MFB_EOF

std_logic_vector(MFB_REGIONS-1 downto 0)

out

TX_MFB_SOF_POS

std_logic_vector(MFB_REGIONS*max(1, log2(MFB_REGION_SIZE))-1 downto 0)

out

TX_MFB_EOF_POS

std_logic_vector(MFB_REGIONS*log2(MFB_REGION_SIZE*MFB_BLOCK_SIZE)-1 downto 0)

out

TX_MFB_SRC_RDY

std_logic

out

TX_MFB_DST_RDY

std_logic

in