SHAKEDOWN

ENTITY SHAKEDOWN IS

Merges input MVB of N items to output MVB of M items. There can be at most M items valid on input MVB, otherwise, items might get lost, if you . Can be used as combinational logic with OUTPUT_REG disabled.

Working principle of SHAKEDOWN.
../../../../_images/shakedown-vld.svg
Situation with more valid items then OUTPUTS.
../../../../_images/shakedown-inv.svg

Situation, where there are more vld items on INPUT interface then OUTPUTS. SHAKEDOWN does not solve this situation and when not solved externally, items may get lost.

Generics

Generic

Type

Default

Description

INPUTS

integer

32

Number of inputs (at most OUTPUTS valid!!!)

OUTPUTS

integer

4

Number of outputs

DATA_WIDTH

integer

32

Data width of each input/output in bits

OUTPUT_REG

boolean

false

Output register enable

Ports

Port

Type

Mode

Description

CLK

std_logic

in

RESET

std_logic

in

DIN

std_logic_vector(INPUTS*DATA_WIDTH-1 downto 0)

in

Input data N item MVB

DIN_VLD

std_logic_vector(INPUTS-1 downto 0)

in

Input data valid

DIN_SRC_RDY

std_logic

in

Input data ready

DIN_DST_RDY

std_logic

out

DOUT

std_logic_vector(OUTPUTS*DATA_WIDTH-1 downto 0)

out

Output data M item MVB

DOUT_VLD

std_logic_vector(OUTPUTS-1 downto 0)

out

Output data valid

DOUT_SRC_RDY

std_logic

out

Output data ready

DOUT_DST_RDY

std_logic

in

MERGE_N_TO_M

ENTITY MERGE_N_TO_M IS

OBSOLETE!!! Use at your own risk. This component is used by SHAKEDOWN. Merges N item MVB into M item MVB, on RX interface, there must be at most M items marked as valid, otherwise, they will be lost!. This component can be used as combinational logic.

Generics

Generic

Type

Default

Description

INPUTS

integer

32

Number of inputs (at most M active!!!)

OUTPUTS

integer

4

Number of outputs

DATA_WIDTH

integer

32

Data width (LSB of each item is valid bit!!!)

OUTPUT_REG

boolean

true

Pipe enable

Ports

Port

Type

Mode

Description

CLK

std_logic

in

Common clock

RESET

std_logic

in

Common reset

INPUT_DATA

std_logic_vector(INPUTS*DATA_WIDTH-1 downto 0)

in

Input MVB N item interface

INPUT_SRC_RDY

std_logic

in

INPUT_DST_RDY

std_logic

out

OUTPUT_DATA

std_logic_vector(OUTPUTS*DATA_WIDTH-1 downto 0)

out

Output MVB M item interface

OUTPUT_SRC_RDY

std_logic

out

OUTPUT_DST_RDY

std_logic

in