MFB_CHECKSUM_L3L4
- ENTITY MFB_CHECKSUM_L3L4 IS
This module performs parallel calculation of L3 and L4 checksums. It takes an MFB stream with packets and an MVB stream with metadata, merges them using METADATA_INSERTOR, duplicates the stream using MFB_DUPLICATION, and processes both streams in parallel through MFB_CHECKSUM_L3 and MFB_CHECKSUM_L4 modules. The outputs are then merged using MVB_MERGE_ITEMS to produce a single MVB interface with both L3 and L4 checksum results.
Generics
PortsGeneric
Type
Default
Description
MFB_REGIONS
natural
4
Number of Regions within a data word, must be power of 2.
MFB_REGION_SIZE
natural
8
Region size (in Blocks).
MFB_BLOCK_SIZE
natural
8
Block size (in Items).
MFB_ITEM_WIDTH
natural
8
Item width (in bits), must be 8.
PKT_MTU
natural
2**14
Maximum size of a packet (in Items).
L3_OFFSET_WIDTH
natural
10
Width of L3 offset signal in bits.
L3_LENGTH_WIDTH
natural
13
Width of L3 length signal in bits.
L4_OFFSET_WIDTH
natural
10
Width of L4 offset signal in bits.
L4_LENGTH_WIDTH
natural
13
Width of L4 length signal in bits.
DEVICE
string
“AGILEX”
FPGA device name. Options: ULTRASCALE, STRATIX10, AGILEX, …
Port
Type
Mode
Description
=====
Clock and Reset
=====
=====
CLK
std_logic
in
RESET
std_logic
in
=====
RX MFB interface (packet data)
=====
=====
RX_MFB_DATA
std_logic_vector(MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH-1 downto 0)
in
RX_MFB_SOF_POS
std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REGION_SIZE))-1 downto 0)
in
RX_MFB_EOF_POS
std_logic_vector(MFB_REGIONS*max(1,log2(MFB_REGION_SIZE*MFB_BLOCK_SIZE))-1 downto 0)
in
RX_MFB_SOF
std_logic_vector(MFB_REGIONS-1 downto 0)
in
RX_MFB_EOF
std_logic_vector(MFB_REGIONS-1 downto 0)
in
RX_MFB_SRC_RDY
std_logic
in
RX_MFB_DST_RDY
std_logic
out
=====
RX MVB interface (metadata for each packet)
=====
=====
RX_MVB_L3_CSUM_ORIG
std_logic_vector(MFB_REGIONS*16-1 downto 0)
in
L3 checksum original value.
RX_MVB_L3_CSUM_EN
std_logic_vector(MFB_REGIONS-1 downto 0)
in
Enable L3 checksum calculation.
RX_MVB_L3_OFFSET
std_logic_vector(MFB_REGIONS*L3_OFFSET_WIDTH-1 downto 0)
in
Offset of the L3 header (from SOF).
RX_MVB_L3_LENGTH
std_logic_vector(MFB_REGIONS*L3_LENGTH_WIDTH-1 downto 0)
in
Length of the L3 header (from SOF).
RX_MVB_L4_CSUM_ORIG
std_logic_vector(MFB_REGIONS*16-1 downto 0)
in
L4 checksum original value.
RX_MVB_L4_CSUM_EN
std_logic_vector(MFB_REGIONS-1 downto 0)
in
Enable L4 checksum calculation.
RX_MVB_L4_OFFSET
std_logic_vector(MFB_REGIONS*L4_OFFSET_WIDTH-1 downto 0)
in
Offset of the L4 protocol (from SOF).
RX_MVB_L4_LENGTH
std_logic_vector(MFB_REGIONS*L4_LENGTH_WIDTH-1 downto 0)
in
Length of the L4 protocol (from SOF).
RX_MVB_L4_PROTOCOL
std_logic_vector(MFB_REGIONS*8-1 downto 0)
in
L4 protocol number (required for pseudo-header).
RX_MVB_IP_SRC_ADDR
std_logic_vector(MFB_REGIONS*128-1 downto 0)
in
Source IP address (required for pseudo-header).
RX_MVB_IP_DST_ADDR
std_logic_vector(MFB_REGIONS*128-1 downto 0)
in
Destination IP address (required for pseudo-header).
RX_MVB_IP_VER6
std_logic_vector(MFB_REGIONS-1 downto 0)
in
Indicates if the packet is IPv6.
RX_MVB_VLD
std_logic_vector(MFB_REGIONS-1 downto 0)
in
MVB valid and ready signals.
RX_MVB_SRC_RDY
std_logic
in
RX_MVB_DST_RDY
std_logic
out
=====
TX MVB interface (checksum results)
=====
=====
TX_MVB_L3_CSUM
std_logic_vector(MFB_REGIONS*16-1 downto 0)
out
L3 checksum calculated value.
TX_MVB_L3_CSUM_OK
std_logic_vector(MFB_REGIONS-1 downto 0)
out
L3 checksum comparison result (OK).
TX_MVB_L3_CSUM_EN
std_logic_vector(MFB_REGIONS-1 downto 0)
out
L3 checksum calculation permission (EN).
TX_MVB_L4_CSUM
std_logic_vector(MFB_REGIONS*16-1 downto 0)
out
L4 checksum calculated value.
TX_MVB_L4_CSUM_OK
std_logic_vector(MFB_REGIONS-1 downto 0)
out
L4 checksum comparison result (OK).
TX_MVB_L4_CSUM_EN
std_logic_vector(MFB_REGIONS-1 downto 0)
out
L4 checksum calculation permission (EN).
TX_MVB_VLD
std_logic_vector(MFB_REGIONS-1 downto 0)
out
MVB valid and ready signals.
TX_MVB_SRC_RDY
std_logic
out
TX_MVB_DST_RDY
std_logic
in