Barrel Shifter

ENTITY BARREL_SHIFTER_GEN IS

Generically adjustable barrel shifter where single bits as well as whole blocks can be shifted. The direction can also be set.

Generics

Generic	Type	Default	Description
BLOCKS	integer	256	input/output data width in BLOCKs
BLOCK_SIZE	integer	64	size of one block in bits
SHIFT_LEFT	boolean	false	set true to shift left, false to shift right

Ports

Port	Type	Mode	Description
DATA_IN	std_logic_vector(BLOCKS*BLOCK_SIZE-1 downto 0)	in
DATA_OUT	std_logic_vector(BLOCKS*BLOCK_SIZE-1 downto 0)	out
SEL	std_logic_vector(log2(BLOCKS)-1 downto 0)	in

ENTITY BARREL_SHIFTER_GEN_PIPED IS

Generics

Generic	Type	Default	Description
BLOCKS	integer	256	input/output data width in BLOCKs
BLOCK_WIDTH	integer	64	width of one block in bits
BAR_SHIFT_LATENCY	integer	0	barrel shifting latency
INPUT_REG	boolean	false	input register enable (adds additional 1 CLK latency)
OUTPUT_REG	boolean	false	output register enable (adds additional 1 CLK latency)
SHIFT_LEFT	boolean	false	set true to shift left, false to shift right
METADATA_WIDTH	integer	0	Metadata can be useful when you want to send additional info to the TX side along with the rotated value. (for example the value of the RX_SEL signal)

Ports

Port	Type	Mode	Description
CLK	std_logic	in	unused when MUX_LATENCY==0 and OUTPUT_REG==INPUT_REG==false
RESET	std_logic	in	unused when MUX_LATENCY==0 and OUTPUT_REG==INPUT_REG==false
RX_DATA	std_logic_vector(BLOCK_WIDTH*BLOCKS-1 downto 0)	in
RX_SEL	std_logic_vector(log2(BLOCKS)-1 downto 0)	in
RX_METADATA	std_logic_vector(METADATA_WIDTH-1 downto 0)	in
RX_SRC_RDY	std_logic	in
RX_DST_RDY	std_logic	out
TX_DATA	std_logic_vector(BLOCK_WIDTH*BLOCKS-1 downto 0)	out
TX_METADATA	std_logic_vector(METADATA_WIDTH-1 downto 0)	out
TX_SRC_RDY	std_logic	out
TX_DST_RDY	std_logic	in