AxiS Packet Extender

ENTITY AXIS_PACKET_EXTENDER IS

AXIS_PACKET_EXTENDER extends each AXI-Stream packet by a configurable number of random bytes. RX_AXI_EXT_LEN_S sets the number of extension bytes at the start of the packet, RX_AXI_EXT_LEN_E sets the number of extension bytes at the end of the packet.

Internally, the original packet data is first extended from the start (shifted by the extension length in bytes) and logic to handle spilling of the end to an extra word. Then, in the next register stage, it is extended at the end by just lengthening the Keep signal while also handling the spilling bytes.

Warning

Currently, the maximum of both extensions (separately) cannot be more than a word.

Generics

Generic	Type	Default	Description
AXI_TDATA_WIDTH	natural	512	AXI-Stream data bus width in bits.
AXI_TUSER_WIDTH	natural	11	AXI-Stream metadata bus width in bits, valid with SOP.
EXT_LEN_S_WIDTH	natural	5	Bit-width of extension length signal (from the packet’s Start). Max extend value will be 2**EXT_LEN_S_WIDTH - 1 bytes.
EXT_LEN_E_WIDTH	natural	3	Bit-width of extension length signal (from the packet’s End). Max extend value will be 2**EXT_LEN_E_WIDTH - 1 bytes.

Ports

Port	Type	Mode	Description
CLK	std_logic	in
RESET	std_logic	in
=====	AXI-Stream RX interface.	=====	=====
RX_AXI_TDATA	std_logic_vector(AXI_TDATA_WIDTH-1 downto 0)	in
RX_AXI_TUSER	std_logic_vector(AXI_TUSER_WIDTH-1 downto 0)	in	User metadata, valid with SOP.
RX_AXI_TKEEP	std_logic_vector(AXI_TDATA_WIDTH/8-1 downto 0)	in
RX_AXI_TLAST	std_logic	in
RX_AXI_TVALID	std_logic	in
RX_AXI_TREADY	std_logic	out
RX_AXI_EXT_LEN_S	std_logic_vector(EXT_LEN_S_WIDTH-1 downto 0)	in	Extension length from the packet’s Start, in bytes, valid with SOP.
RX_AXI_EXT_LEN_E	std_logic_vector(EXT_LEN_E_WIDTH-1 downto 0)	in	Extension length from the packet’s End, in bytes, valid with SOP.
=====	AXI-Stream TX interface.	=====	=====
TX_AXI_TDATA	std_logic_vector(AXI_TDATA_WIDTH-1 downto 0)	out
TX_AXI_TUSER	std_logic_vector(AXI_TUSER_WIDTH-1 downto 0)	out	User metadata, valid with SOP.
TX_AXI_TKEEP	std_logic_vector(AXI_TDATA_WIDTH/8-1 downto 0)	out
TX_AXI_TLAST	std_logic	out
TX_AXI_TVALID	std_logic	out
TX_AXI_TREADY	std_logic	in