.. readme.rst: Documentation of AVMM agent
.. Copyright (C) 2024 CESNET z. s. p. o.
.. Author(s): Yaroslav Marushchenko <xmarus09@stud.fit.vutbr.cz>

.. SPDX-License-Identifier: BSD-3-Clause

**********
AVMM Agent
**********

This agent is a low-level agent that is responsible for communication through the Intel Avalon Memory Mapped interface.
This package **uvm_avmm** contains two agents. The slave agent sends requests to the DUT. The master agent samples requests from DUT and sends responses from the memory model.

The agents are configured with three parameters:

- ADDRESS_WIDTH
- DATA_WIDTH
- BURST_WIDTH

Sequence Items
==============

The following table shows properties in the *sequence_items* classes.
This is a low-level protocol, so if you generate data in sequence, please be careful not to break the AVMM protocol rules.

sequence_item_request
---------------------

.. code-block:: systemverilog

    rand logic ready;
    rand logic read;
    rand logic write;
    rand logic [ADDRESS_WIDTH-1 : 0] address;
    rand logic [DATA_WIDTH -1 : 0] writedata;
    rand logic [BURST_WIDTH -1 : 0] burstcount;

sequence_item_response
----------------------

.. code-block:: systemverilog

    rand logic ready;
    rand logic [DATA_WIDTH-1 : 0] readdata;
    rand logic readdatavalid;

Response logic
==============

The master agent is capable of generating responses to input requests. For that reason, the agent contains two other components: *request_subscriber* and *memory_model*.
These two components use internal items, *request_item* and *response_item*.

request_item
------------

.. admonition:: Note
      :class: note

    *request_item_type_e* is an enum of { **READ**, **WRITE** }

.. code-block:: systemverilog

    request_item_type_e request_type;
    logic [ADDRESS_WIDTH-1 : 0] address;
    logic [DATA_WIDTH -1 : 0] writedata;
    logic [BURST_WIDTH -1 : 0] burstcount;

response_item
-------------

.. code-block:: systemverilog

    logic [DATA_WIDTH-1 : 0] readdata;
    time timestamp;

request_subscriber
------------------

The *request_subscriber* converts *sequence_item_request* into *request_item*.

memory_model
------------

The *memory_model*'s main purpose is to process the input *request_item*.
For **READ** *request_item*, the *memory_model* outputs timestamped *request_item* with read data, which are used by sequences to send *sequence_item_response* items.
The model uses a file as its memory.

The model can be configured using the *config_item*:

- **generated_memory_file** Is a switch that tells the model to generate the memory file on the path *memory_filepath*. Set this property off if you want to use your memory file. The default is on.
- **generated_memory_file_type** Determines the type of generated file. It can be **NULL** (all bits are 0) or **RANDOM** (random content). The default is **NULL**.
- **memory_filepath** The path of the memory file. It can be useful if you can't use the autogenerated name based on the UVM component hierarchy.

Sequences
=========

The sequences use the *response_item* fifo located in their sequencer to generate *sequence_item_response* items.
There are several sequences that work with *response_item*'s timestamp and response latency and can be useful for more complex DUT verification.